The invention is directed to a connection network for adjustable connection of circuit arrangements, particularly programmable circuit arrangements, whereby every circuit arrangement can be transmitter or receiver. It is to be understood that the term "circuit arrangement" as used herein refers to a circuit element such as a programmable logic array (PLA).
It is required for some applications that a plurality of circuit arrangements be capable of being adjustably connected to one another. Each of these circuit arrangements can thereby be transmitter or receiver. This can be the case when a plurality of programmable circuits, abbreviated as PLA, are combined in a sequential logic system. Such programmable circuits contain an AND level and an OR level. The operation of the input signals in accord with a function table stored in the AND level ensues in the AND level. These operation results of the AND level that are also referred to as product terms, are supplied to the OR level and are operated there according to the function table contained in the OR level to form what are referred to as sum terms. The sum terms are output at the outputs of the OR level. Such a PLA has input lines that lead to the AND level and output lines that lead out from the OR level available to it. The structure of a programmable circuit arrangement can also be such that the AND level and the OR level are combined and it is possible to define by programming whether the lines leading into the programmable circuit arrangement--referred to as data lines in future--should be input lines or output lines.